Self-refereed on-chip jitter measurement circuit using Vernier oscillators

@article{Xia2005SelfrefereedOJ,
  title={Self-refereed on-chip jitter measurement circuit using Vernier oscillators},
  author={Tian Xia and Hao Zheng and Jing Li and Ahmed Ginawi},
  journal={IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05)},
  year={2005},
  pages={218-223}
}
Among many recently proposed on-chip jitter measurement designs, Vernier delay line (VDL) is one of the most widely adopted methods that can achieve fine resolution. However, there are two major design challenges: the first is the mismatching of delay buffers; the second is the unavailability of an on-chip jitter free reference signal. To overcome these two challenges, we propose a self-refereed on-chip jitter measurement circuit. This measurement circuit eliminates the requirement to a jitter… CONTINUE READING
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