Selective word reading for high performance and low power processor

Abstract

In this paper, we propose Selective Word Reading (SWR) technique for a low power processor without a loss of performance. The development of this technique was motivated by the differences between store unit sizes per storage level. In typical cases, the CPU register stores data with a unit size of one word, the L1 cache stores data using a unit size of… (More)
DOI: 10.1145/2103380.2103386

9 Figures and Tables

Topics

  • Presentations referencing similar topics