Security and Vulnerability Implications of 3D ICs

  title={Security and Vulnerability Implications of 3D ICs},
  author={Yang Xie and Chongxi Bao and Caleb Serafy and Tiantao Lu and Ankur Srivastava and Mark Mohammad Tehranipoor},
  journal={IEEE Transactions on Multi-Scale Computing Systems},
Physical limit of transistor miniaturization has driven chip design into the third dimension. 3D integration technology emerges as a viable option to improve chip performance and increase device density in a direction orthogonal to costly device scaling. As 3D integration is becoming a promising technology for next-generation chip design, recent years have… CONTINUE READING

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