Secure JTAG Implementation Using Schnorr Protocol

@article{Das2013SecureJI,
  title={Secure JTAG Implementation Using Schnorr Protocol},
  author={A. Das and Jean DaRolt and S. Ghosh and S. Seys and S. Dupuis and G. Natale and M. Flottes and B. Rouzeyre and I. Verbauwhede},
  journal={Journal of Electronic Testing},
  year={2013},
  volume={29},
  pages={193-209}
}
  • A. Das, Jean DaRolt, +6 authors I. Verbauwhede
  • Published 2013
  • Computer Science
  • Journal of Electronic Testing
  • The standard IEEE 1149.1 (Test Access Port and Boundary-Scan Architecture, also known as JTAG port) provides a useful interface for embedded systems development, debug, and test. In an 1149.1-compatible integrated circuit, the JTAG port allows the circuit to be easily accessed from the external world, and even to control and observe the internal scan chains of the circuit. However, the JTAG port can be also exploited by attackers to mount several cryptographic attacks. In this paper we propose… CONTINUE READING
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    References

    SHOWING 1-10 OF 50 REFERENCES
    JTAG Security System Based on Credentials
    • 33
    Multi-level secure JTAG architecture
    • 17
    Protected JTAG
    • 37
    • Highly Influential
    Anti-tamper JTAG TAP design enables DRM to JTAG registers and P1687 on-chip instruments
    • Christopher J. Clark
    • Engineering, Computer Science
    • 2010 IEEE International Symposium on Hardware-Oriented Security and Trust (HOST)
    • 2010
    • 53
    An Area Optimized Reconfigurable Encryptor for AES-Rijndael
    • 18
    • PDF
    Guide to Elliptic Curve Cryptography
    • 2,642
    • PDF
    An ECDSA Processor for RFID Authentication
    • 47
    • PDF
    ASIC-hardware-focused comparison for hash functions MD5, RIPEMD-160, and SHS
    • 22
    Integrated LFSR Reseeding, Test-Access Optimization, and Test Scheduling for Core-Based System-on-Chip
    • 36
    • PDF