Schottky-barrier S/D MOSFETs with high-k gate dielectrics and metal-gate electrode

  title={Schottky-barrier S/D MOSFETs with high-k gate dielectrics and metal-gate electrode},
  author={Shiyang Zhu and H. Y. Yu and S. J. Whang and J. H. Chen and Chen Shen and Chunxiang Zhu and S. H. Lee and M. F. Li and D. S. H. Chan and W. J. Yoo and Antti Du and C. H. Tung and Jarnail Singh and A S Chin and D. L. Kwong},
  journal={IEEE Electron Device Letters},
This letter presents a low-temperature process to fabricate Schottky-barrier silicide source/drain transistors (SSDTs) with high-/spl kappa/ gate dielectric and metal gate. For p-channel SSDTs (P-SSDT) using PtSi sourece/drain (S/D) , excellent electrical performance of I/sub on//I/sub off//spl sim/10/sup 7/-10/sup 8/ and subthreshold slope of 66 mV/dec have been achieved. For n-channel SSDTs (N-SSDTs) using DySi/sub 2-x/ S/D , I/sub on//I/sub off/ can reach /spl sim/10/sup 5/ at V/sub ds/ of 0… CONTINUE READING

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