Scheduling time-constrained instructions on pipelined processors

@article{Leung2001SchedulingTI,
  title={Scheduling time-constrained instructions on pipelined processors},
  author={Allen Leung and Krishna V. Palem and Amir Pnueli},
  journal={ACM Trans. Program. Lang. Syst.},
  year={2001},
  volume={23},
  pages={73-103}
}
In this work we investigate the problem of scheduling instructions on idealized microprocessors with multiple pipelines, in the presence of precedence constraints, release-times, deadlines, and latency constraints. A latency of <italic>l<subscrpt>ij</subscrpt></italic> specifies that there must be at least <italic>l<subscrpt>ij</subscrpt></italic> time-steps between the completion time of instruction <italic>i</italic> and the start time of instruction <italic>j</italic>. A latency of <italic>l… CONTINUE READING
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