Scan chain design for three-dimensional integrated circuits (3D ICs)

  title={Scan chain design for three-dimensional integrated circuits (3D ICs)},
  author={Xiaoxia Wu and Paul Falkenstern and Yuan Xie},
  journal={2007 25th International Conference on Computer Design},
Scan chains are widely used to improve the testability of IC designs. In traditional 2D IC designs, various design techniques on the construction of scan chains have been proposed to facilitate DFT (Design-For-Test). Recently, three-dimensional (3D) technologies have been proposed as a promising solution to continue technology scaling. In this paper, we study the scan chain construction for 3D ICs, examining the impact of 3D technologies on scan chain ordering. Three different 3D scan chain… CONTINUE READING
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