Scalable interconnection networks for partial column array processor architectures

@inproceedings{Takala2000ScalableIN,
  title={Scalable interconnection networks for partial column array processor architectures},
  author={Jarmo H. Takala and David A. Akopian and Jaakko Astola and Jukka Saarinen},
  booktitle={ISCAS},
  year={2000}
}
In parallel architectures for discrete trigonometric transforms, the number of processing elements is typically dependent on the transform size. Scalable architectures can be constructed with partial column approach where the computation is performed iteratively with less number of processing elements. This approach results in need for complex data reordering for realizing the interconnections between the processing columns. In this paper, such interconnection networks performing temporal and… CONTINUE READING

References

Publications referenced by this paper.
Showing 1-10 of 10 references

Synthesisable FFT cores,

  • J. V. McCanny, Y. Hu
  • Proc. IEEE Workshop on Signal Processing Systems,
  • 1997

Partial column FFT pipelines

  • J. M. Wills
  • IEEE Trans . on Circuits and Systems11 : Analog…
  • 1995

Kronecker products and shuffle algebra

  • M. Conner J. Granata, R. Tolimieri
  • IEEE Trans . on Computers

Paral - lel architecture for fast transforms with trigonometric kemel

  • J. Bruguera, R. Doallo
  • IEEE Trans . on Parallel and Distributed Systems

Similar Papers

Loading similar papers…