This paper describes a visualization architecture for scalable computer systems. The architecture is currently being prototyped for use in Beowulf-class clustered systems. A set of OpenGL frame buffers are driven in parallel by a set of CPUs. The visualization architecture merges the contents of these frame buffers by user-programmable associative and commulative combining operations. The system hardware is built from off-the-shelf components including OpenGL accelerators, Field Programmable Gate Arrays (FPGAs), and gigabit network interfaces and switches. A second-generation prototype supports 60 Hz operation at 1024 × 1024 pixel resolution with interactive latency up to 1000 nodes.