Scalable Digital CMOS Comparator Using a Parallel Prefix Tree

@article{AbdelHafeez2013ScalableDC,
  title={Scalable Digital CMOS Comparator Using a Parallel Prefix Tree},
  author={Saleh Abdel-Hafeez and Ann Gordon-Ross and B. Parhami},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2013},
  volume={21},
  pages={1989-1998}
}
We present a new comparator design featuring wide-range and high-speed operation using only conventional digital CMOS cells. Our comparator exploits a novel scalable parallel prefix structure that leverages the comparison outcome of the most significant bit, proceeding bitwise toward the least significant bit only when the compared bits are equal. This method reduces dynamic power dissipation by eliminating unnecessary transitions in a parallel prefix structure that generates the N-bit… CONTINUE READING
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