SXGA pinned photodiode CMOS image sensor in 0.35 /spl mu/m technology

  title={SXGA pinned photodiode CMOS image sensor in 0.35 /spl mu/m technology},
  author={K. Findlater and R. K. Henderson and Donald Baxter and J. E. D. Hurwitz and L. A. Grant and Yvon Cazaux and François Roy and Didier H{\'e}rault and Y. Marcellier},
  journal={2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.},
  pages={218-489 vol.1}
A 30 frames/s SXGA 5.6 /spl mu/m pinned photodiode pixel column parallel CMOS image sensor achieves 340 /spl mu/V noise floor and 40 pA/cm/sup 2/ dark current. Performance is limited by pixel 1/f noise, not by the ADC noise floor of 140 /spl mu/V. The column ADC memory employs a custom DRAM to save area. The sensor utilizes a 0.35 /spl mu/m 1P 3M CMOS process. 
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