STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator

@article{Song2017STTRAMBD,
  title={STT-RAM Buffer Design for Precision-Tunable General-Purpose Neural Network Accelerator},
  author={Lili Song and Ying Wang and Yinhe Han and Xiaowei Li and Yuanqing Cheng},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2017},
  volume={25},
  pages={1285-1296}
}
Multilevel spin toque transfer RAM (STT-RAM) is a suitable storage device for energy-efficient neural network accelerators (NNAs), which relies on large-capacity on-chip memory to support brain-inspired large-scale learning models from conventional artificial neural networks to current popular deep convolutional neural networks. In this paper, we… CONTINUE READING