SEU-Hardened Dual Data Rate Flip-Flop Using C-Elements

Abstract

Aggressive device scaling has reduced the gate capacitance, which resulted in increasing sensitivity to radiation induced soft errors. In addition, technology scaling has reached to the point of maximum clock frequency to maintain acceptable energy consumption. On the other hand, technology advancements are demanding higher throughput and data rates. To… (More)
DOI: 10.1109/DFT.2010.27

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