SEGRA: a very fast general area router for multichip modules

  title={SEGRA: a very fast general area router for multichip modules},
  author={Young-Jun Cha and Chong S. Rim and Kazuo Nakajima},
  journal={IEEE Trans. on CAD of Integrated Circuits and Systems},
We present a very fast area router for multichip module (MCM) design. Given a set of nets and a routing area, the router repeatedly selects two layers from top to bottom and routes as many nets as possible until all the nets are routed. The router uses a line sweep technique and a simple net selection algorithm. By employing efficient data structures and a novel priority scheme, the routing can be completed in time almost proportional to the size of the routing area. When applied to the… CONTINUE READING


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