SAT-based techniques for determining backbones for post-silicon fault localisation

@article{Zhu2011SATbasedTF,
  title={SAT-based techniques for determining backbones for post-silicon fault localisation},
  author={Charlie Shucheng Zhu and Georg Weissenbacher and Divjyot Sethi and Sharad Malik},
  journal={2011 IEEE International High Level Design Validation and Test Workshop},
  year={2011},
  pages={84-91}
}
The localisation of faults in integrated circuits is a dominating factor in the overall verification effort. The limited observability of internal signals of chips complicates the spatial and temporal localisation of bugs in post-silicon validation. We address the problem of recovering the values of unobservable signals of a chip prototype from state bits recorded in a trace-buffer of limited size using a SAT-based analysis. Our technique is a novel application of backbones. This term refers to… CONTINUE READING
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