Runtime and quality tradeoffs in FPGA placement and routing

  title={Runtime and quality tradeoffs in FPGA placement and routing},
  author={Chandra Mulpuri and Scott Hauck},
Many applications of FPGAs, especially logic emulation and custom computing, require the quick placement and routing of circuit designs. In these applications, the advantages FPGA-based systems have over software simulation are diminished by the long run-times of current CAD software used to map the circuit onto FPGAs. To improve the run-time advantage of FPGA systems, users may be willing to trade some mapping quality for a reduction in CAD tool runtimes. In this paper, we seek to establish… CONTINUE READING
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