Runtime Power Limiting of Parallel Applications on Intel Xeon Phi Processors

  title={Runtime Power Limiting of Parallel Applications on Intel Xeon Phi Processors},
  author={Gary Lawson and Vaibhav Sundriyal and Masha Sosonkina and Yuzhong Shen},
  journal={2016 4th International Workshop on Energy Efficient Supercomputing (E2SC)},
Energy-efficient computing is crucial to achieving exascale performance. Power capping and dynamic voltage/frequency scaling may be used to achieve energy savings. The Intel Xeon Phi implements a power capping strategy, where power thresholds are employed to dynamically set voltage/frequency at the runtime. By default, these power limits are much higher than the majority of applications would reach. Hence, this work aims to set the power limits according to the workload characteristics and… CONTINUE READING

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The general atomic and molecular electronic structure system (GAMESS), 2016

  • Gordon Research Group
  • gamess/index.html
  • 2016
Highly Influential
10 Excerpts

Sandia national laboratories high performance computing power application programming interface (api) specification, 2016

  • J. Laros
  • 2016
1 Excerpt

Intel Xeon Phi Processor High Performance Programming: Knights Landing Edition

  • J. Jeffers, J. Reinders, A. Sodani
  • MK Publishers,
  • 2015
1 Excerpt

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