Robust Boolean reasoning for equivalence checking and functional property verification

@article{Kuehlmann2002RobustBR,
  title={Robust Boolean reasoning for equivalence checking and functional property verification},
  author={Andreas Kuehlmann and Viresh Paruthi and Florian Krohm and Malay K. Ganai},
  journal={IEEE Trans. on CAD of Integrated Circuits and Systems},
  year={2002},
  volume={21},
  pages={1377-1394}
}
Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analys is require efficient Boolean reasoning for problems derived from circuits. Traditionally, canonical representations, e.g., BDDs, orstructural SAT methods, are used to solve different problem instances. Each of these techniques offer specific strengths that make them e fficient for particular problem structures. However, neither structural techniques based on SAT, nor functional methods… CONTINUE READING
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