Rigel: A 1,024-Core Single-Chip Accelerator Architecture

@article{Johnson2011RigelA1,
  title={Rigel: A 1,024-Core Single-Chip Accelerator Architecture},
  author={Daniel R. Johnson and Matthew R. Johnson and John H. Kelm and William Tuohy and Steven S. Lumetta and Sanjay J. Patel},
  journal={IEEE Micro},
  year={2011},
  volume={31},
  pages={30-41}
}
Rigel is a single-chip accelerator architecture with 1,024 independent processing cores targeted at a broad class of data- and task-parallel computation. This article discusses Rigel's motivation, evaluates its performance scalability as well as power and area requirements, and explores memory systems in the context of 1,024-core single-chip accelerators. The authors also consider future opportunities and challenges for large-scale designs. 
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