RideNN: A New Rider Optimization Algorithm-Based Neural Network for Fault Diagnosis in Analog Circuits

  title={RideNN: A New Rider Optimization Algorithm-Based Neural Network for Fault Diagnosis in Analog Circuits},
  author={D. Binu and B. S. Kariyappa},
  journal={IEEE Transactions on Instrumentation and Measurement},
  • D. Binu, B. Kariyappa
  • Published 1 January 2019
  • Computer Science, Engineering
  • IEEE Transactions on Instrumentation and Measurement
Fault diagnosis in electronic circuits is an emerging area of research, where fully automated diagnosis systems are being developed for the investigation of the circuits. Developing test methods for the diagnosis of faults in analog circuits is still a complex task. Consequently, a technique for the fault diagnosis in analog circuits is designed by proposing a new optimization algorithm, named, rider optimization algorithm (ROA). The development of ROA is based on a group of riders, racing… 
Fault Isolation in Analog Circuits using Multi-Support Vector Neural Network
  • Binu Dennis, B. Kariyappa
  • Engineering, Computer Science
    2018 3rd International Conference on Communication and Electronics Systems (ICCES)
  • 2018
This paper proposes an automatic fault isolation technique using the Multi-Support Vector Neural Network (Multi-SVNN) that performs better fault isolation in analog circuits as compared to the existing methods.
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