Review on VHDL based design of convolutional encoder using vedic mathematics and viterbi decoder using parallel processing

@inproceedings{Dagamwar2016ReviewOV,
  title={Review on VHDL based design of convolutional encoder using vedic mathematics and viterbi decoder using parallel processing},
  author={Miss. Bhagyashree V. Dagamwar and R. N. Mandavgane and D. M. Khatri},
  year={2016}
}
  • Miss. Bhagyashree V. Dagamwar, R. N. Mandavgane, D. M. Khatri
  • Published 2016
Convolution encoder and viterbi decoder are widely used in many communication system due to the excellent error control performance.The convolutional encoder encodes the message and then the encoded bits are generated. The bits which are encoded are again sent to the Viterbi decoder and then decoded output is obtained. Convolution encoder using vedic mathematics which leads to improve delay and faster speed. There are sixteen sutras in Vedic multiplication in which “Urdhva Tiryakbhyam” has been… CONTINUE READING

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