Review on Low Power Pulse Triggered Flip-Flops

  • S. Patil, Prof. Anil Wanare
  • Published 2015


In digital CMOS design, power consumption has been a major concern for the past several years. Advanced IC fabrication technology allows the use of nano-scaled devices; so the power dissipation becomes the major problem. Flip-flops are widely used in many sequential logic circuits such as registers, memory elements, counters, etc. These circuits are widely… (More)


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