Reversible logic synthesis for minimization of full-adder circuit

@article{Babu2003ReversibleLS,
  title={Reversible logic synthesis for minimization of full-adder circuit},
  author={H. Babu and Md. Rafiqul Islam and A. Chowdhury and Syed Mostahed Ali Chowdhury},
  journal={Euromicro Symposium on Digital System Design, 2003. Proceedings.},
  year={2003},
  pages={50-54}
}
Reversible logic is of the growing importance to many future technologies. [...] Key Method This proposed full-adder circuit contains only three gates and two garbage outputs whereas earlier full-adder circuit by M. Perkowski et al. (2001) requires four gates and produces two garbage outputs and another existing full-adder circuit by Md. H. H Azad Khan (2002) requires three gates but produces three garbage outputs. Thus, the proposed full-adder circuit is efficient in terms of number of gates with compared to M…Expand
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Proceedings. Euromicro Symposium on Digital System Design
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