Rethinking DRAM design and organization for energy-constrained multi-cores

  title={Rethinking DRAM design and organization for energy-constrained multi-cores},
  author={Aniruddha N. Udipi and Naveen Muralimanohar and Niladrish Chatterjee and Rajeev Balasubramonian and Al Davis and Norman P. Jouppi},
DRAM vendors have traditionally optimized the cost-per-bit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, where a single request activates thousands of bit-lines in many DRAM chips, only to return a single cache line to the CPU. The focus on cost-per-bit is questionable in modern-day servers where operating costs can easily exceed the purchase cost. Modern technology trends are also placing very different demands on the… CONTINUE READING
Highly Influential
This paper has highly influenced 19 other papers. REVIEW HIGHLY INFLUENTIAL CITATIONS
Highly Cited
This paper has 243 citations. REVIEW CITATIONS
Related Discussions
This paper has been referenced on Twitter 1 time. VIEW TWEETS


Publications citing this paper.
Showing 1-10 of 176 extracted citations

A Study of Leveraging Memory Level Parallelism for DRAM System on Multi-core/Many-Core Architecture

2013 12th IEEE International Conference on Trust, Security and Privacy in Computing and Communications • 2013
View 7 Excerpts
Highly Influenced

Towards energy-proportional datacenter memory with mobile DRAM

2012 39th Annual International Symposium on Computer Architecture (ISCA) • 2012
View 7 Excerpts
Highly Influenced

Last Level Collective Hardware Prefetching For Data-Parallel Applications

2017 IEEE 24th International Conference on High Performance Computing (HiPC) • 2017
View 7 Excerpts
Highly Influenced

244 Citations

Citations per Year
Semantic Scholar estimates that this publication has 244 citations based on the available data.

See our FAQ for additional information.


Publications referenced by this paper.
Showing 1-8 of 8 references

VLSI Memory Chip Design

View 11 Excerpts
Highly Influenced

Chipkill Correct Memory Architecture

David Locklear
View 11 Excerpts
Highly Influenced

Virtualized and flexible ECC for main memory

ASPLOS • 2010
View 3 Excerpts
Highly Influenced

Improving Power and Data Efficiency with Threaded Memory Modules

2006 International Conference on Computer Design • 2006
View 7 Excerpts
Highly Influenced

Durable Memory RS/6000 System Design

FTCS • 1994
View 7 Excerpts
Highly Influenced

Similar Papers

Loading similar papers…