Rethinking DRAM design and organization for energy-constrained multi-cores

@inproceedings{Udipi2010RethinkingDD,
  title={Rethinking DRAM design and organization for energy-constrained multi-cores},
  author={Aniruddha N. Udipi and Naveen Muralimanohar and Niladrish Chatterjee and Rajeev Balasubramonian and Al Davis and Norman P. Jouppi},
  booktitle={ISCA},
  year={2010}
}
DRAM vendors have traditionally optimized the cost-per-bit metric, often making design decisions that incur energy penalties. A prime example is the overfetch feature in DRAM, where a single request activates thousands of bit-lines in many DRAM chips, only to return a single cache line to the CPU. The focus on cost-per-bit is questionable in modern-day servers where operating costs can easily exceed the purchase cost. Modern technology trends are also placing very different demands on the… CONTINUE READING
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