Retention-aware placement in DRAM (RAPID): software methods for quasi-non-volatile DRAM

@article{Venkatesan2006RetentionawarePI,
  title={Retention-aware placement in DRAM (RAPID): software methods for quasi-non-volatile DRAM},
  author={Ravi K. Venkatesan and Stephen Herr and Eric Rotenberg},
  journal={The Twelfth International Symposium on High-Performance Computer Architecture, 2006.},
  year={2006},
  pages={155-165}
}
Measurements of an off-the-shelf DRAM chip confirm that different cells retain information for different amounts of time. This result extends to DRAM rows, or pages (retention time of a page is defined as the shortest retention time among its constituent cells). Currently, a single worst-case refresh period is selected based on the page with the shortest retention time. Even with refresh optimized for room temperature, the worst page limits the safe refresh period to no longer than 500 ms. Yet… CONTINUE READING
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