Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures

@article{DiTomaso2015ResilientAP,
  title={Resilient and Power-Efficient Multi-Function Channel Buffers in Network-on-Chip Architectures},
  author={Dominic DiTomaso and Avinash Karanth Kodi and Ahmed Louri and Razvan C. Bunescu},
  journal={IEEE Transactions on Computers},
  year={2015},
  volume={64},
  pages={3555-3568}
}
Network-on-Chips (NoCs) are quickly becoming the standard communication paradigm for the growing number of cores on the chip. While NoCs can deliver sufficient bandwidth and enhance scalability, NoCs suffer from high power consumption due to the router microarchitecture and communication channels that facilitate inter-core communication. As technology keeps scaling down in the nanometer regime, unpredictable device behavior due to aging, infant mortality, design defects, soft errors, aggressive… CONTINUE READING

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