• Corpus ID: 148574301

Research Note: An Open Source Bluespec Compiler

@article{Greaves2019ResearchNA,
  title={Research Note: An Open Source Bluespec Compiler},
  author={David J. Greaves},
  journal={ArXiv},
  year={2019},
  volume={abs/1905.03746}
}
  • D. Greaves
  • Published 8 May 2019
  • Computer Science
  • ArXiv
In this Research Note we report on an open-source compiler for the Bluespec hardware description language. 

Figures from this paper

Further sub-cycle and multi-cycle schedulling support for Bluespec Verilog

The reference semantics of Bluespec is extended, allowing multiple updates to a register within one clock cycle and automatic instantiation of arbiters for multi-clock cycle behaviour and early results from an open-source, fully-functional implementation are reported.

Formal verification of high-level synthesis

The first HLS tool that is mechanically verified to preserve the behaviour of its input software is presented, called Vericert, which extends the CompCert verified C compiler with a new hardware-oriented intermediate language and a Verilog back end, and has been proven correct in Coq.

A Multi-Paradigm C++-based Hardware Description Language

References

SHOWING 1-5 OF 5 REFERENCES

Chisel: Constructing hardware in a Scala embedded language

Chisel, a new hardware construction language that supports advanced hardware design using highly parameterized generators and layered domain-specific hardware languages, is introduced by embedding Chisel in the Scala programming language, raising the level of hardware design abstraction.

Bluespec System Verilog: efficient, correct RTL from high level specifications

  • R. Nikhil
  • Computer Science
    Proceedings. Second ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2004. MEMOCODE '04.
  • 2004
By means of code samples, demonstrations and measured results, it is illustrated how Bluespec System Verilog, in an environment familiar to hardware designers, can significantly improve productivity without compromising generated hardware quality.

Kiwi: Synthesis of FPGA Circuits from Parallel Programs

  • D. GreavesSatnam Singh
  • Computer Science
    2008 16th International Symposium on Field-Programmable Custom Computing Machines
  • 2008
A system that takes .NET assembly language with suitable custom attributes as input and produces Verilog output which is mapped to FPGAs which is used to transform C# parallel programs into circuits for realization on FPGA.

From software to accelerators with LegUp high-level synthesis

This paper presents on overview of the LegUp design methodology and system architecture, and discusses ongoing work on profiling, hardware/software partitioning, hardware accelerator quality improvements, Pthreads/OpenMP support, visualization tools, and debugging support.

Lava: hardware design in Haskell

The system design exploits functional programming language features, such as monads and type classes, to provide multiple interpretations of circuit descriptions that implement standard circuit analyses such as simulation, formal verification and the generation of code for the production of real circuits.