Remove the memory wall: from performance modeling to architecture optimization

  • Xian-He Sun
  • Published 2006 in
    Proceedings 20th IEEE International Parallel…

Abstract

Summary form only given. Data access is a known bottleneck of high performance computing (HPC). The prime sources of this bottleneck are the performance gap between the processor and memory storage and the large memory requirements of ever-hungry applications. Although advanced memory hierarchies and parallel file systems have been developed in recent years… (More)
DOI: 10.1109/IPDPS.2006.1639621
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@article{Sun2006RemoveTM, title={Remove the memory wall: from performance modeling to architecture optimization}, author={Xian-He Sun}, journal={Proceedings 20th IEEE International Parallel & Distributed Processing Symposium}, year={2006}, pages={2 pp.-} }