Remembrance of circuits past: macromodeling by data mining in large analog design spaces

@inproceedings{Liu2002RemembranceOC,
  title={Remembrance of circuits past: macromodeling by data mining in large analog design spaces},
  author={Hongzhou Liu and Amith Singhee and Rob A. Rutenbar and L. Richard Carley},
  booktitle={DAC},
  year={2002}
}
The introduction of simulation-based analog synthesis tools creates a new challenge for analog modeling. These tools routinely visit 103 to 105 fully simulated circuit solution candidates. What might we do with all this circuit data? We show how to adapt recent ideas from large-scale data mining to build models that capture significant regions of this visited performance space, parameterized by variables manipulated by synthesis, trained by the data points visited during synthesis. Experimental… CONTINUE READING
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