Reliability of Strain-Si FPGA Product Fabricated by Novel Ultimate Spacer Process

@article{Luo2006ReliabilityOS,
  title={Reliability of Strain-Si FPGA Product Fabricated by Novel Ultimate Spacer Process},
  author={Y. H. Luo and D. N. Nayak and J. K. Jerry Lee and Daniel Gitlin and C. T. Tsai},
  journal={2006 IEEE International Integrated Reliability Workshop Final Report},
  year={2006},
  pages={175-178}
}
Strain-Si field-programmable gate arrays (FPGA) is fabricated by using ultimate spacer process (USP) with a single capping stress liner. An overall 15% speed enhancement without compromising yield was obtained. The product reliability assessment, including HTOL, TCT, ESD (CDM and HBM) and latch-up, was performed simultaneously on USP and control parts. They show comparable product reliability and both pass product specs. Wafer level device reliability was also studied for NBTI, HCI and oxide… CONTINUE READING