Register allocation & spilling via graph coloring

@inproceedings{Chaitin1982RegisterA,
  title={Register allocation \& spilling via graph coloring},
  author={Gregory J. Chaitin},
  booktitle={SIGPLAN '82},
  year={1982}
}
  • G. Chaitin
  • Published in SIGPLAN '82 23 June 1982
  • Computer Science
In a previous paper we reported the successful use of graph coloring techniques for doing global register allocation in an experimental PL/I optimizing compiler. When the compiler cannot color the register conflict graph with a number of colors equal to the number of available machine registers, it must add code to spill and reload registers to and from storage. Previously the compiler produced spill code whose quality sometimes left much to be desired, and the ad hoe techniques used took… 
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References

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The Register Allocation Phase of an experimental PL/I compiler for the IBM System/370 is described, which suggests that global register allocation approaching that of hand-coded assembly language may be attainable.
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Preliminary results of an experimental implementation in a PL/I optimizing compiler suggest that global register allocation approaching that of hand-coded assembly language may be attainable.
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