Reducing the complexity of the register file in dynamic superscalar processors

@inproceedings{Balasubramonian2001ReducingTC,
  title={Reducing the complexity of the register file in dynamic superscalar processors},
  author={Rajeev Balasubramonian and Sandhya Dwarkadas and David H. Albonesi},
  booktitle={MICRO},
  year={2001}
}
Dynamic superscalar processors execute multiple instructions out-of-order by looking for independent operations within a large window. The number of physical registers within the processor has a direct impact on the size of this window as most in-flight instructions require a new physical register at dispatch. A large multi-ported register file helps improve the instruction-level parallelism (ILP), but may have a detrimental effect on clock speed, especially in future wire-limited technologies… CONTINUE READING
Highly Influential
This paper has highly influenced 23 other papers. REVIEW HIGHLY INFLUENTIAL CITATIONS
Highly Cited
This paper has 254 citations. REVIEW CITATIONS
174 Citations
10 References
Similar Papers

Citations

Publications citing this paper.
Showing 1-10 of 174 extracted citations

254 Citations

02040'02'05'09'13'17
Citations per Year
Semantic Scholar estimates that this publication has 254 citations based on the available data.

See our FAQ for additional information.

References

Publications referenced by this paper.

Similar Papers

Loading similar papers…