Reducing the complexity of instruction-level power models for VLIW processors

@article{Bona2005ReducingTC,
  title={Reducing the complexity of instruction-level power models for VLIW processors},
  author={Andrea Bona and Mariagiovanna Sami and Donatella Sciuto and Cristina Silvano and Vittorio Zaccaria and Roberto Zafalon},
  journal={Design Autom. for Emb. Sys.},
  year={2005},
  volume={10},
  pages={49-67}
}
Aim of this paper is to propose a high-level power exploration framework based on an instruction-level energy model for VLIW (Very Long Instruction Word) architectures. More specifically, the present paper deals with the reduction of the complexity of the energy model of K -issue VLIW processors from exponential with respect to the number of operations within the Instruction Set O(|I S A|K ) to quadratic (O(K ∗ |I S A|2)). The complexity of the energy model has been further simplified by… CONTINUE READING

Citations

Publications citing this paper.
Showing 1-8 of 8 extracted citations

A Multi-Granularity Power Modeling Methodology for Embedded Processors

IEEE Transactions on Very Large Scale Integration (VLSI) Systems • 2011
View 5 Excerpts
Highly Influenced

Power modeling and estimation during ADL-driven embedded processor design

2013 4th Annual International Conference on Energy Aware Computing Systems and Applications (ICEAC) • 2013
View 1 Excerpt

References

Publications referenced by this paper.
Showing 1-10 of 30 references

Cycle-accurate macro-models for RT-level power analysis

IEEE Trans. VLSI Syst. • 1998
View 3 Excerpts
Highly Influenced

Similar Papers

Loading similar papers…