Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors

@article{Kumar2006ReducingRR,
  title={Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors},
  author={Sumeet Kumar and Aneesh Aggarwal},
  journal={The Twelfth International Symposium on High-Performance Computer Architecture, 2006.},
  year={2006},
  pages={212-221}
}
With reducing feature size, increasing chip capacity, and increasing clock speed, microprocessors are becoming increasingly susceptible to transient (soft) errors. Redundant multi-threading (RMT) is an attractive approach for concurrent error detection and recovery. However, redundant threads significantly increase the pressure on the processor resources, resulting in dramatic performance impact. In this paper, we propose reducing resource redundancy as a means to mitigate the performance… CONTINUE READING
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