Reducing TLB power requirements

@article{Juan1997ReducingTP,
  title={Reducing TLB power requirements},
  author={Toni Juan and Tom{\'a}s Lang and Juan J. Navarro},
  journal={Proceedings of 1997 International Symposium on Low Power Electronics and Design},
  year={1997},
  pages={196-201}
}
Translation look-aside buffers (TLBs) are small caches to speed-up address translation in processors with virtual memory. This paper considers two issues: (1) a comparison of the power consumption of fully-associative, set-associative, and direct mapped TLBs for the same miss rate and (2) the proposal of modifications of the basic cells and of the structure of set-associative TLBs to reduce the power. The power evaluation is done using a model and the miss rates are obtained from simulations of… CONTINUE READING

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