Reduced-Complexity Min-Sum Algorithm for Decoding LDPC Codes With Low Error-Floor

  title={Reduced-Complexity Min-Sum Algorithm for Decoding LDPC Codes With Low Error-Floor},
  author={Fabian Angarita and Javier Valls-Coquillat and Vicenç Almenar and Vicente Torres-Carot},
  journal={IEEE Transactions on Circuits and Systems I: Regular Papers},
This paper proposes a low-complexity min-sum algorithm for decoding low-density parity-check codes. It is an improved version of the single-minimum algorithm where the two-minimum calculation is replaced by one minimum calculation and a second minimum emulation. In the proposed one, variable correction factors that depend on the iteration number are introduced and the second minimum emulation is simplified, reducing by this way the decoder complexity. This proposal improves the performance of… CONTINUE READING
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Highthroughput FPGA-based emulator for structured LDPC codes

  • F. Angarita, V. Torres, A. Perez-Pascual, J. Valls
  • Proc. 19th IEEE Int. Conf. Electronics, Circuits…
  • 2012
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