Realization of PRAMs: Processor Design

@inproceedings{Keller1994RealizationOP,
  title={Realization of PRAMs: Processor Design},
  author={J{\"o}rg Keller and Wolfgang J. Paul and Dieter Scheerer},
  booktitle={WDAG},
  year={1994}
}
We present a processor architecture for SB-PRAM, a parallel machine with shared address space and uniform memory access time. The processor uses a reduced instruction set and provides in hardware mechanisms for the emulation of shared memory: random hashing to avoid hot spots, multiple contexts with regular scheduling to hide network latency and fast context switch to minimize overhead. Furthermore it provides hardware support for parallel operating systems and for the eecient compilation of… CONTINUE READING

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