Rate Optimal VLSI Design from Data Flow Graph

@inproceedings{Oh1998RateOV,
  title={Rate Optimal VLSI Design from Data Flow Graph},
  author={Moonwook Oh and Soonhoi Ha},
  booktitle={DAC},
  year={1998}
}
This paper considers the rate optimal VLSI design of a recursive data ow graph (DFG). Previous research on rate optimal scheduling is not directly applicable to VLSI design. We propose a technique that inserts bu er registers to allow overlapped rate optimal implementation of VLSI. We illustrate that nonoverlapped schedules can be implemented by a simpler… CONTINUE READING