Rapid migration to VLSI

Abstract

The authors describe how the evolution of digital ASICs from first attempts to VLSI was accelerated in creating a 115000-gate equivalent array, in a 340-pin quad flat pack, within three generations. The first generation consisted of a 7800 gate eq. array containing the 'glue logic' for a MIL-STD-1553B, dual redundant serial bus. CAE workstations were used… (More)

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