Radiation Tolerant VLSI Circuits in Standard Deep Submicron CMOS Technologies for the LHC Experiments: Practical Design Aspects

Abstract

We discuss design issues related to the extensive use of Enclosed Layout Transistors (ELT's) and guard rings in deep submicron CMOS technologies in order to improve radiation tolerance of ASIC's designed for the LHC experiments (the Large Hadron Collider at present under construction at CERN). We present novel aspects related to the use of ELT's: noise… (More)

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@inproceedings{Anelli2001RadiationTV, title={Radiation Tolerant VLSI Circuits in Standard Deep Submicron CMOS Technologies for the LHC Experiments: Practical Design Aspects}, author={G. Anelli and Melanie C.W. Campbell and Marco Delmastro and F. Faccio and Shaul Florian and A Giraldo and E. H. M. Heijne and P. Jarron and K. Kloukinas and A. Marchioro and P. Moreira and W. Snoeys}, year={2001} }