RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications

  title={RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications},
  author={C.-H. Jan and M. Agostinelli and Hemant Deshpande and Mohammed A. El-Tanani and W. M. Hafez and Umesh Jalan and L. Janbay and Min-Soo Kang and Hasnain Lakdawala and Jianhui Lin and Y-L Lu and Sivakumar P. Mudanai and Joodong Park and Anisur Rahman and Jad Rizk and W.-K. Shin and Krishnamurthy Soumyanath and Hiroyuki Tashiro and C. Tsai and P. Vandervoorn and J.-Y. Yeh and P. Bai},
  journal={2010 International Electron Devices Meeting},
The impact of silicon technology scaling trends and the associated technological innovations on RF CMOS device characteristics are examined. The application of novel strained silicon and high-k/metal gate technologies not only benefits digital systems, but significantly improves RF performance. The peak cut-off frequency (fT) doubles from 209 GHz in the 90 nm node to 445 GHz at the 32 nm node. 1/f flicker noise reduces by an order of magnitude from the 0.13 um node to the 32 nm node. Transistor… CONTINUE READING
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