REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections

@article{Lee2015REDELFAE,
  title={REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections},
  author={Jinho Lee and Kyungsu Kang and Kiyoung Choi},
  journal={JETC},
  year={2015},
  volume={12},
  pages={26:1-26:22}
}
3D integrated circuits (3D ICs) using through-silicon vias (TSVs) allow to envision the stacking of dies with different functions and technologies, using as an interconnect backbone a 3D network-on-chip (NoC). However, partial vertical connection in 3D NoCs seems unavoidable because of the large overhead of TSV itself (e.g., large footprint, low fabrication yield, additional fabrication processes) as well as the heterogeneity in dimension. This article proposes an energy-efficient deadlock-free… CONTINUE READING