REAPR: Reconfigurable engine for automata processing

Abstract

Finite automata have proven their usefulness in high-profile domains ranging from network security to machine learning. While prior work focused on their applicability for purely regular expression workloads such as antivirus and network security rulesets, recent research has shown that automata can optimize the performance for algorithms in other areas such as machine learning and even particle physics. Unfortunately, their emulation on traditional CPU architectures is fundamentally slow and further bottlenecked by memory. In this paper, we present REAPR: Reconfigurable Engine for Automata PRocessing, a flexible framework that synthesizes RTL for automata processing applications as well as I/O to handle data transfer to and from the kernel. We show that even with memory and control flow overheads, FPGAs still enable extremely high-throughput computation of automata workloads compared to other architectures.

DOI: 10.23919/FPL.2017.8056759

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Cite this paper

@article{Xie2017REAPRRE, title={REAPR: Reconfigurable engine for automata processing}, author={Ted Xie and Vinh Dang and Jack Wadden and Kevin Skadron and Mircea R. Stan}, journal={2017 27th International Conference on Field Programmable Logic and Applications (FPL)}, year={2017}, pages={1-8} }