Programming models for hybrid CPU/FPGA chips

  title={Programming models for hybrid CPU/FPGA chips},
  author={David L. Andrews and Douglas Niehaus and Peter J. Ashenden},
Designers of embedded and real-time systems are continually challenged to meet tighter system requirements at better price-performance ratios. Best-practice methods have long promoted the use of commercial-off-the-shelf components to reduce design costs and time to market, but creating COTS components that are reusable in a wide range of applications remains difficult. In part, the challenge lies in satisfying the contradictory design forces of generalization and specialization. Systems… CONTINUE READING
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