Programming customized parallel architectures in FPGA

  title={Programming customized parallel architectures in FPGA},
  author={Ivo Bolsens},
  journal={2010 IEEE International Symposium on Parallel & Distributed Processing, Workshops and Phd Forum (IPDPSW)},
CPUs are multicore (and multi-cache) supported by a coherent, global, shared memory model. FPGAs offer a vast number of distributed programmable function blocks and distributed memory blocks across distributed memory spaces. This presentation will discuss a hybrid computing architecture that unifies the development of applications for a combined CPU-FPGA platform. The proposed programming model is based on message passing (MPI) and distributed memory. NoCs are at the heart of the hybrid… CONTINUE READING