Program interrupt on the Univac scientific computer

@inproceedings{Mersel1956ProgramIO,
  title={Program interrupt on the Univac scientific computer},
  author={Jules Mersel},
  booktitle={AIEE-IRE '56 (Western)},
  year={1956}
}
  • J. Mersel
  • Published in AIEE-IRE '56 (Western) 7 February 1956
  • Computer Science
In the use of high-speed digital computers the general situation has been to have the program or the programmer at the console in sole control of what the machine is doing. In recent years, however, a situation has often occurred where a program, so to speak, has only been lent the machine until a higher priority problem is ready to go on the machine. At these times the machine was stopped, the low priority problem was taken off the machine, and the high priority problem was allowed to run… 
References
  • Microprocessor 4
  • 2020
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