Process Control for 45 nm CMOS logic gate patterning .

Abstract

Bertrand Le Gratiet * , Pascal Gouraud , Enrique Aparicio , Laurene Babaud, Karen Dabertrand, Mathieu Touchet, Stephanie Kremer, Catherine Chaton, Franck Foussadier, Frank Sundermann Jean Massin, Jean-Damien Chapon, Maxime Gatefait, Blandine Minghetti, Jean de-Caunes, Daniel Boutin a STMicroelectronics, 850 rue Jean Monnet, F 38926 Crolles Cedex, France c CEA-Leti, 17 Rue des Martyrs, 38054 Grenoble Cedex 9, France d KLA-Tencor, 32 Chemin du Vieux Chêne, 38920 Meylan, France

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Cite this paper

@inproceedings{Gouraud2009ProcessCF, title={Process Control for 45 nm CMOS logic gate patterning .}, author={Pascal Gouraud and Enrique Aparicio and Laurene Babaud and Karen Dabertrand and Mathieu Touchet and Stephanie Kremer and C. Chaton and Franck Foussadier and Frank Sundermann and Jean Massin and Jean-Damien Chapon and Maxime Gatefait and Blandine Minghetti and Jean de-Caunes and Daniel Boutin}, year={2009} }