Predictive Model for Optimized Design Parameters in Flip-Chip Packages and Assemblies

Abstract

An analytical model is developed to predict the out-of- plane deformation and thermal stresses in multilayered thin stacks subjected to temperature. Coefficient of thermal expansion mismatches among the components (chip, substrate, underfill, flip-chip interconnect or C4s) are the driving force for both first and second levels interconnect reliability… (More)

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Cite this paper

@article{Park2007PredictiveMF, title={Predictive Model for Optimized Design Parameters in Flip-Chip Packages and Assemblies}, author={Seungbae Park and Heui Lee and B. G. Sammakia and Krishnan Raghunathan}, journal={IEEE Transactions on Components and Packaging Technologies}, year={2007}, volume={30}, pages={294-301} }