Predicting EMI induced delay errors in integrated circuits: Sensitivity to the velocity saturation index

@article{Gao2015PredictingEI,
  title={Predicting EMI induced delay errors in integrated circuits: Sensitivity to the velocity saturation index},
  author={Xu Gao and Chunchun Sui and Sameer Hemmady and J. M. Rivera and Lisa Andivahis and David J. Pommerenke and Daryl G. Beetner},
  journal={2015 Asia-Pacific Symposium on Electromagnetic Compatibility (APEMC)},
  year={2015},
  pages={102-105}
}
Integrated circuits (ICs) sometimes fail when their power supply is disrupted by external noise, such as might occur during an electrical fast transient (EFT). A delay model was proposed in [1] which can be used to predict the variations in the delays through logic circuits caused by electromagnetic induced noise in the power supply voltage. This model is relatively simple and requires few parameters, giving it the potential to be used even when the IC is a “black bos” and little information is… CONTINUE READING

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