PowerPC 970 in 130 nm and 90 nm technologies

@article{Rohrer2004PowerPC9I,
  title={PowerPC 970 in 130 nm and 90 nm technologies},
  author={N. Rohrer and M. Canada and E. Cohen and M. Ringler and M. Mayfield and P. Sandon and Paul Kartschoke and J. Heaslip and Jeff Allen and Patrick McCormick and Th. Pfluger and Jason A. Zimmerman and C{\'e}dric Lichtenau and Theresa Werner and Ghadi Salem and Marc C. Ross and David Appenzeller and Dana J. Thygesen},
  journal={2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)},
  year={2004},
  pages={68-69 Vol.1}
}
A 64 b PowerPC microprocessor is introduced in 130 nm and redesigned in 90 nm SOI technology. PowerPC 970 implements a SIMD instruction set with 512 kB L2 cache. It runs at 2.0 GHz with a 1.0 GHz bus in 130 nm. The 90 nm design features PowerTune for rapid frequency and power scaling and electronic fuses.